This invention is concerned with input and output circuits for solid state imaging systems utilizing a focal plane array of optical detectors.
The output circuit which is most commonly used with a charge coupled device (CCD) multiplexer for a focal plane array is the reset gate floating diffusion circuit. The design and operation of this circuit is straightforward, and its use with correlated double sampling removes switching transients, eliminates Nyquist noise associated with the reset switch/node capacitance combination, and suppresses 1/f noise contributions. The reset gate floating diffusion circuit designs known in the prior art, however, provide only a single value for the charge-to-voltage conversion ratio, or output circuit gain, regardless of the amount of charge which is input to the circuit. A single value for the gain is not always optimum over the range of charge which can occur in a typical application. The accommodation of large (near full well) charge packets, for example, may require a low gain, whereas a high gain is preferred with small charge packets to minimize the noise of the electronics and to achieve CCD or detector noise limited performance. Different values of gain are also desirable, for similar reasons, in multiplexer detector input circuits for such applications as space surveillance and infrared astronomy. A high gain is needed for low noise performance in low background environments, while a low gain is required at high background levels to provide sufficient dynamic range and prevent the multiplexer from saturating. A need has thus developed in the art for a circuit which can be controllably switched from a high gain mode, which can be used when low noise requirements can be met, to a low gain mode, which can be used when a large dynamic range requirement can be satisfied.